Aaron Smith
Thu 08 Nov 2018, 16:00 - 17:00
4.31/33, IF

If you have a question about this talk, please contact: Steph Smith (ssmith32)

Talk Title: Is it Time for RISC and CISC to Die?

Abstract: Specialization, accelerators, and machine learning are all the rage. But most of the world’s computing today still uses conventional RISC and CISC CPUs, which expend significant energy to achieve high single-thread performance. Von Neumann ISAs have been so successful because they provide a clean conceptual target for software while running a wide range of algorithms reasonably well. We badly need clean new abstractions that utilize fine-grain parallelism and run energy efficiently.

Prior work (such as the UT-Austin TRIPS EDGE ISA and others) showed how to form blocks of computation containing limited-scope dataflow graphs, which can be thought of as small structures (DAGs) mapped to silicon. In this talk I will describe work that addresses the limitations of early EDGE ISAs and provide results for two specific microarchitectures developed in collaboration with Qualcomm Research. These early results are based on placed and routed RTL in 10nm FinFET.

Bio:  Aaron is a part-time Reader in the School of Informatics at the University of Edinburgh and Principal Researcher at Microsoft. In Edi he co-teaches UG3 Compiling Techniques and is working on binary translation and machine learning related projects with ICSA colleagues. At Microsoft he leads a research team investigating hardware accelerators for datacenter workloads. He is active in the LLVM developer community and a number of IEEE and ACM conferences and has over 50 patents pending.